John Backes

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About John

My research interests include logic synthesis, formal verification, technology mapping, and SAT-based algorithms.

John's Papers

Journal Papers

title: The Synthesis of Cyclic Dependencies with Boolean Satisfiability
authors: John Backes and Marc Riedel
submitted to: ACM Transactions on Design Automation of Electronic Systems, 2011.

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Paper

title: The Analysis and Mapping of Cyclic Circuits with Boolean Satisfiability
authors: John Backes, Brian Fett, and Marc Riedel
submitted to: IEEE Trans. on Computer-Aided Design of Integrated Circuits & Systems, 2011.

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Paper

title: The Synthesis of Stochastic Circuits for Nanoscale Computation
authors: Weikang Qian, John Backes, and Marc Riedel
appeared in: International Journal of Nanotechnology and Molecular Computation,
vol. 1, no. 4, pp. 39–57, 2010.

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Paper

Conference Papers

title: Resolution Proofs as a Data Structure For Logic Synthesis
authors: John Backes and Marc Riedel
presented at: The International Workshop on Logic Synthesis, La Jolla, CA, 2011.

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Paper

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Slides

title: Reduction of Interpolants For Logic Synthesis
authors: John Backes and Marc Riedel
presented at: The International Conference on Computer-Aided Design, San Jose, CA, 2010.

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Paper

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Slides


title: The Synthesis of Cyclic Dependencies with Craig Interpolation
authors: John Backes and Marc Riedel
presented at: The International Workshop on Logic and Synthesis, Berkeley, CA, 2009.
       

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Paper

       

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Slides

title: The Analysis of Cyclic Circuits with Boolean Satisfiability
authors: John Backes, Brian Fett and Marc Riedel
presented at: The International Conference on Computer-Aided Design, San Jose, CA, 2008.
       

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Paper

       

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Slides

Contact Information

  • Email: BackesEmail.gif
  • Phone: (952) 239-7828