Difference between revisions of "John Backes"

Revision as of 04:30, 23 January 2011

My research interests include Logic Synthesis, Formal Verification, Technology Mapping, and SAT-Based Algorithms.

Journal Papers

title:	The Analysis and Mapping of Cyclic Circuits with Boolean Satisfiability
authors:	John Backes, Brian Fett and Marc Riedel
submitted to:	IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2010

title:	The Synthesis of Stochastic Circuits for Nanoscale Computation
authors:	Weikang Qian, John Backes, and Marc Riedel
presented at:	International Journal of Nanotechnology and Molecular Computation, 2010.

Conference Papers

title:	Reduction of Interpolants For Logic Synthesis
authors:	John Backes and Marc Riedel
presented at:	The International Conference on Computer-Aided Design, San Jose, CA, 2010.
presented at:	International Workshop on Logic and Synthesis, Irvine, CA, 2010.

title:	The Synthesis of Cyclic Dependencies with Craig Interpolation
authors:	John Backes and Marc Riedel
presented at:	International Workshop on Logic and Synthesis, Berkeley, CA, 2009.

title:	The Analysis of Cyclic Circuits with Boolean Satisfiability
authors:	John Backes, Brian Fett and Marc Riedel
presented at:	The International Conference on Computer-Aided Design, San Jose, CA, 2008.

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 <span class="plainlinks">[http://cctbio.ece.umn.edu/wiki/images/0/00/Backes_Riedel_Reduction_Of_Interpolants_For_Logic_Synthesis.ppt http://cctbio.ece.umn.edu/wiki/images/3/36/Ppt.jpg]</span>
-<br> [http://cctbio.ece.umn.edu/wiki/images/0/00/Backes_Riedel_Reduction_Of_Interpolants_For_Logic_Synthesis.pptt Slides]
+<br> [http://cctbio.ece.umn.edu/wiki/images/0/00/Backes_Riedel_Reduction_Of_Interpolants_For_Logic_Synthesis.ppt Slides]
 |}